// EMBEDDED LINUX & YOCTO

Embedded Linux &
Yocto BSP Experts

We build production Yocto BSPs, custom Linux distributions, U-Boot bootloaders, and device trees for NXP i.MX, TI Sitara, Xilinx Zynq, and custom SoMs.

View Our Work
40+
BSP Projects
Yocto
Certified Expertise
6+
SoC Families
LTS
Kernel Support

Embedded Linux is a superpower — and a trap. The flexibility of the Linux kernel means you can run on almost any hardware, but getting a stable, minimal, production-ready image that boots in under 3 seconds, fits in 128MB of flash, and survives 10 years of field operation requires deep expertise in the Yocto Project build system, the Linux kernel, and the hardware itself.

Codewave Labs has built Yocto BSPs from scratch for industrial IoT gateways, medical imaging devices, smart EV chargers, digital signage players, and custom NXP i.MX8 and Xilinx Zynq platforms. We write clean, upstreamable meta layers, not one-off hacks.

We also take over troubled BSPs — if your Yocto build is slow, your image is bloated with packages you don't need, your kernel is out of date, or your board has a mysterious 30-second hang during boot, we can fix it.

// WHAT WE DELIVER

Our Capabilities

Yocto BSP from Scratch

Full BSP layer creation from bare metal: machine configuration, U-Boot recipe, kernel recipe, device tree, machine features, and DISTRO configuration.

Custom Linux Distributions

Minimal production images with only required packages, read-only rootfs, overlay filesystems, A/B partition schemes, and secure boot integration.

U-Boot Bootloader

U-Boot porting, SPL/TPL configuration, custom board files, display init, network boot, USB mass storage, and verified boot chain.

Device Tree Authoring

Complete device tree and device tree overlay development for custom hardware: pin mux, clock tree, regulators, display pipelines, and PCIe.

OTA Update Systems

SWUpdate, Mender, RAUC, or custom OTA pipelines. A/B rootfs, delta updates, rollback safety, hardware-enforced update verification.

Boot Time Optimisation

Systemd analysis with systemd-analyze, initramfs optimisation, kernel config trimming, parallel boot sequencing. We routinely achieve sub-3s boot times.

// TECHNOLOGIES & PLATFORMS

Platforms We Master

NXP i.MX 8 / i.MX 93
Cortex-A55/A53 SoM platforms, VPU, GPU, ISP, MIPI-DSI, PCIe Gen3
NXP i.MX 6 / 7
Long-lifecycle industrial platforms, widely deployed in IoT gateways
TI AM62x / AM64x
Sitara processors for industrial automation, motor control, TSN Ethernet
Xilinx Zynq / Zynq UltraScale+
ARM + FPGA platforms, PetaLinux, custom PL drivers, Vivado integration
Raspberry Pi CM4 / CM5
Production-grade CM4 BSPs with custom carrier boards, RT_PREEMPT
Rockchip RK3399 / RK3568
High-performance Android/Linux SoCs for HMI and media applications
NVIDIA Jetson
L4T BSP customisation, JetPack, custom camera pipelines, DeepStream
Microchip SAMA5 / MPFS
RISC-V HartSoftware PolarFire SoC, SAMA5D2 for secure IoT applications
// HOW WE ENGAGE

Our Approach

01

Hardware Audit

Review schematics, SoC reference BSP, and existing codebase. Identify clock tree, power domains, and peripheral requirements.

02

Layer Architecture

Design clean meta layer structure, machine config, kernel config fragments, and recipe organisation before writing a line of BitBake.

03

Build & Iterate

Bring up U-Boot → kernel → rootfs incrementally. Each peripheral validated on hardware before moving on.

04

Harden & Ship

Security hardening, read-only rootfs, OTA pipeline, boot time optimisation, and full documentation handoff.

// COMMON QUESTIONS

Frequently Asked Questions

We work with all active LTS Yocto releases — currently Kirkstone (4.0 LTS), Scarthgap (5.0 LTS), and Styhead (5.1). We recommend LTS releases for production products due to the 2-year maintenance window. We can also maintain custom BSPs on older releases like Dunfell or Zeus.
A BSP for a well-documented SoM with an existing upstream reference BSP: 3–6 weeks. A BSP for completely custom hardware with a new SoC family: 8–16 weeks. Boot time optimisation on an existing BSP: 1–2 weeks.
Yes. We audit your IMAGE_INSTALL list, identify packages pulled in by dependencies you don't need, configure a minimal distro policy, strip debug symbols, and switch to musl libc if appropriate. We commonly reduce image sizes by 40-70%.
Yes. We implement robust OTA pipelines using SWUpdate, RAUC, or Mender, with A/B rootfs partitioning, atomic updates, hardware-watchdog-enforced rollback, and cryptographic update verification.
Yes. We apply and maintain the PREEMPT_RT patch set, configure the kernel for deterministic latency, tune IRQ affinity, isolate CPUs with isolcpus, and measure latency with cyclictest to verify real-time performance.
Absolutely — this is a common engagement. We audit the existing layer structure, identify technical debt (e.g. bbappends that patch upstream recipes incorrectly, missing SRC_URI checksums, hard-coded MACHINE paths), and systematically clean it up.
// GET STARTED

Ready to Start?

Tell us about your project — hardware platform, current challenges, timeline, and goals. First consultation is always free. We typically respond within 1 business day.

Email
hello@codewavelabs.ca
Response time
Within 1 business day
Location
Canada 🇨🇦 — serving clients worldwide

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